reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
2845 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); 3044 LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to " 3045 << RI.getName(DestReg) << '\n'); 3255 RI.canRealignStack(MF); 3270 RI.canRealignStack(MF); 4213 Register Reg32 = RI.getSubReg(Reg, X86::sub_32bit); 4744 const TargetRegisterClass *RC = getRegClass(MI.getDesc(), OpNum, &RI, MF); 4768 const TargetRegisterClass *RC = getRegClass(MI.getDesc(), OpNum, &RI, MF); 4787 const TargetRegisterClass *RC = getRegClass(MI.getDesc(), OpNum, &RI, MF); 4901 &RI, MF); 4930 NewMI->getOperand(0).setReg(RI.getSubReg(DstReg, X86::sub_32bit)); 5028 if (!RI.needsStackRealignment(MF)) 5471 const TargetRegisterClass *RC = getRegClass(MCID, Index, &RI, MF); 5579 const TargetRegisterClass *DstRC = getRegClass(MCID, 0, &RI, MF); 5613 const TargetRegisterClass *RC = getRegClass(MCID, Index, &RI, MF); 5664 DstRC = getRegClass(MCID, 0, &RI, MF); 6657 if (RI.getEncodingValue(MI.getOperand(0).getReg()) >= 16) 6659 if (RI.getEncodingValue(MI.getOperand(1).getReg()) >= 16) 6663 RI.getEncodingValue(MI.getOperand(2).getReg()) >= 16) 8080 if (MI.modifiesRegister(X86::RSP, &RI) || MI.readsRegister(X86::RSP, &RI) || 8080 if (MI.modifiesRegister(X86::RSP, &RI) || MI.readsRegister(X86::RSP, &RI) || 8086 if (MI.readsRegister(X86::RIP, &RI) ||lib/Target/X86/X86InstrInfo.h
151 const X86RegisterInfo &getRegisterInfo() const { return RI; } 411 return MBB.computeRegisterLiveness(&RI, X86::EFLAGS, I, 4) ==