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References

lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  520   Width1 = getOpcodeWidth(*Paired, TII);
  693             EltOffset1 + CI.Width1 == EltOffset0) &&
  737   const unsigned Width = (CI.Width0 + CI.Width1);
 1204   const unsigned Width = CI.Width0 + CI.Width1;
 1232   if (CI.Width0 == 0 || CI.Width0 == 0 || CI.Width0 + CI.Width1 > 4)
 1237     assert((countPopulation(CI.DMask0 | CI.DMask1) == CI.Width0 + CI.Width1) &&
 1253   assert(CI.Width1 >= 1 && CI.Width1 <= 3);
 1253   assert(CI.Width1 >= 1 && CI.Width1 <= 3);
 1256     Idx1 = Idxs[0][CI.Width1 - 1];
 1257     Idx0 = Idxs[CI.Width1][CI.Width0 - 1];
 1260     Idx1 = Idxs[CI.Width0][CI.Width1 - 1];
 1269     switch (CI.Width0 + CI.Width1) {
 1282     switch (CI.Width0 + CI.Width1) {
 1789         OptimizeListAgain |= (CI.Width0 + CI.Width1) < 16;
 1798         OptimizeListAgain |= (CI.Width0 + CI.Width1) < 4;
 1807         OptimizeListAgain |= (CI.Width0 + CI.Width1) < 4;
 1816         OptimizeListAgain |= (CI.Width0 + CI.Width1) < 4;