reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1297 MachineBasicBlock *MBB = CI.I->getParent(); 1298 DebugLoc DL = CI.I->getDebugLoc(); 1300 const unsigned Opcode = getNewOpcode(CI); 1302 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI); 1307 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI); 1310 const auto *Src0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); 1311 const auto *Src1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata); 1313 BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::REG_SEQUENCE), SrcReg) 1319 auto MIB = BuildMI(*MBB, CI.Paired, DL, TII->get(Opcode)) 1325 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); 1331 assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand()); 1331 assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand()); 1333 const MachineMemOperand *MMOa = *CI.I->memoperands_begin(); 1334 const MachineMemOperand *MMOb = *CI.Paired->memoperands_begin(); 1337 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) 1338 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset)) 1339 .addImm(std::min(CI.Offset0, CI.Offset1)) // offset 1339 .addImm(std::min(CI.Offset0, CI.Offset1)) // offset 1340 .addImm(CI.GLC0) // glc 1341 .addImm(CI.SLC0) // slc 1343 .addImm(CI.DLC0) // dlc 1347 moveInstsAfter(MIB, CI.InstsToMove); 1349 CI.I->eraseFromParent(); 1350 CI.Paired->eraseFromParent();