reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachineInstr.h

  469     if (isRegSequence() && OpIdx > 1 && (OpIdx % 2) == 0)

lib/CodeGen/GlobalISel/RegisterBankInfo.cpp

  214         if (MI.isRegSequence()) {

lib/CodeGen/MachinePipeliner.cpp

 1290     if (!SU.getInstr()->isCopy() && !SU.getInstr()->isRegSequence())
 1324         if (TmpMI->isPHI() || TmpMI->isRegSequence()) {

lib/CodeGen/PeepholeOptimizer.cpp

  240                              (MI.isRegSequence() || MI.isInsertSubreg() ||
 1018     assert(MI.isRegSequence() && "Invalid instruction");
 1879   assert((Def->isRegSequence() || Def->isRegSequenceLike()) &&
 2064   if (Def->isRegSequence() || Def->isRegSequenceLike())

lib/CodeGen/ProcessImplicitDefs.cpp

   65       !MI->isRegSequence() &&

lib/CodeGen/TargetInstrInfo.cpp

 1169   assert((MI.isRegSequence() ||
 1172   if (!MI.isRegSequence())

lib/CodeGen/TwoAddressInstructionPass.cpp

 1715       if (mi->isRegSequence())

lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

 2116   if (MI.isRegSequence()) {

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  243   assert(MI.isRegSequence());
  773       if (UseMI->isCopy() || UseMI->isRegSequence()) {

lib/Target/AMDGPU/SIFoldOperands.cpp

  453   if (!Def || !Def->isRegSequence())
  561   if (UseMI->isRegSequence()) {

lib/Target/AMDGPU/SIInstrInfo.cpp

 6380   assert(MI.isRegSequence());

lib/Target/ARM/A15SDOptimizer.cpp

  288   if (MI->isRegSequence() && usesRegClass(MI->getOperand(1),
  334   if (MI->isRegSequence() && usesRegClass(MI->getOperand(1), &ARM::SPRRegClass))
  398   if (MI->isCopyLike() || MI->isInsertSubreg() || MI->isRegSequence() ||

lib/Target/ARM/ARMBaseInstrInfo.cpp

 4271       ResolvedDefMI->isRegSequence() || ResolvedDefMI->isImplicitDef()) {
 4607   if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() ||
 4628   if (MI.isCopyLike() || MI.isInsertSubreg() || MI.isRegSequence() ||

lib/Target/Hexagon/HexagonConstPropagation.cpp

 1941   if (MI.isRegSequence()) {

lib/Target/Hexagon/HexagonGenInsert.cpp

  948     bool Skip = MI->isCopy() || MI->isRegSequence();

lib/Target/Hexagon/HexagonSubtarget.cpp

  346   if ((DstInst->isRegSequence() || DstInst->isCopy()) && Dst->NumSuccs == 1) {