|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc21365 { 3677, 5, 1, 0, 373, 0, 0x80a9cbc005831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #3677 = VCVTNE2PS2BF16Zrrk
26145 { 8457, 5, 1, 0, 335, 0, 0x80a9afc002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #8457 = VPACKSSDWZrrk
26198 { 8510, 5, 1, 0, 335, 0, 0x80a8afc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #8510 = VPACKUSDWZrrk
26348 { 8660, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80abb7c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #8660 = VPADDSWZrrk
26392 { 8704, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80ab77c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #8704 = VPADDUSWZrrk
26414 { 8726, 5, 1, 0, 1084, 0|(1ULL<<MCID::Commutable), 0x80abf7c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #8726 = VPADDWZrrk
26596 { 8908, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80ab8fc002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #8908 = VPAVGWZrrk
27552 { 9864, 5, 1, 0, 1164, 0, 0x80add7c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #9864 = VPERMI2Wrrk
27553 { 9865, 5, 1, 0, 1164, 0|(1ULL<<MCID::Commutable), 0x80edd7c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #9865 = VPERMI2Wrrkz
27932 { 10244, 5, 1, 0, 1164, 0, 0x80adf7c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10244 = VPERMT2Wrrk
27933 { 10245, 5, 1, 0, 1164, 0|(1ULL<<MCID::Commutable), 0x80edf7c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10245 = VPERMT2Wrrkz
27950 { 10262, 5, 1, 0, 1138, 0, 0x80ae37c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10262 = VPERMWZrrk
28284 { 10596, 5, 1, 0, 438, 0, 0x80a813c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10596 = VPMADDUBSWZrrk
28416 { 10728, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80abbbc002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10728 = VPMAXSWZrrk
28518 { 10830, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80a8fbc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10830 = VPMAXUWZrrk
28620 { 10932, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80ababc002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #10932 = VPMINSWZrrk
28722 { 11034, 5, 1, 0, 442, 0|(1ULL<<MCID::Commutable), 0x80a8ebc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #11034 = VPMINUWZrrk
29335 { 11647, 5, 1, 0, 438, 0|(1ULL<<MCID::Commutable), 0x80a82fc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #11647 = VPMULHRSWZrrk
29357 { 11669, 5, 1, 0, 438, 0|(1ULL<<MCID::Commutable), 0x80ab93c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #11669 = VPMULHUWZrrk
29379 { 11691, 5, 1, 0, 438, 0|(1ULL<<MCID::Commutable), 0x80ab97c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #11691 = VPMULHWZrrk
29459 { 11771, 5, 1, 0, 438, 0|(1ULL<<MCID::Commutable), 0x80ab57c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #11771 = VPMULLWZrrk
30079 { 12391, 5, 1, 0, 438, 0, 0x80adc3c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #12391 = VPSHLDVWZrk
30080 { 12392, 5, 1, 0, 438, 0, 0x80edc3c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #12392 = VPSHLDVWZrkz
30235 { 12547, 5, 1, 0, 438, 0, 0x80adcbc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #12547 = VPSHRDVWZrk
30236 { 12548, 5, 1, 0, 438, 0, 0x80edcbc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #12548 = VPSHRDVWZrkz
30564 { 12876, 5, 1, 0, 533, 0, 0x80ac4bc004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #12876 = VPSLLVWZrrk
30778 { 13090, 5, 1, 0, 533, 0, 0x80ac47c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13090 = VPSRAVWZrrk
31010 { 13322, 5, 1, 0, 533, 0, 0x80ac43c004831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13322 = VPSRLVWZrrk
31178 { 13490, 5, 1, 0, 442, 0, 0x80aba7c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13490 = VPSUBSWZrrk
31222 { 13534, 5, 1, 0, 442, 0, 0x80ab67c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13534 = VPSUBUSWZrrk
31244 { 13556, 5, 1, 0, 1084, 0, 0x80abe7c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13556 = VPSUBWZrrk
31528 { 13840, 5, 1, 0, 335, 0, 0x80a9a7c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13840 = VPUNPCKHWDZrrk
31634 { 13946, 5, 1, 0, 335, 0, 0x80a987c002831ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #13946 = VPUNPCKLWDZrrk