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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc21279 { 3591, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x9239b0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3591 = VCVTDQ2PDZ128rmbk
21281 { 3593, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x10239b0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3593 = VCVTDQ2PDZ128rmk
21398 { 3710, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x11279b0003821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3710 = VCVTPD2DQZ128rmbk
21400 { 3712, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x20279b0003821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3712 = VCVTPD2DQZ128rmk
21432 { 3744, 8, 1, 0, 87, 0|(1ULL<<MCID::MayLoad), 0x11256b0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3744 = VCVTPD2PSZ128rmbk
21434 { 3746, 8, 1, 0, 87, 0|(1ULL<<MCID::MayLoad), 0x20256b0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3746 = VCVTPD2PSZ128rmk
21464 { 3776, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x1125ef0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3776 = VCVTPD2QQZ128rmbk
21466 { 3778, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x2025ef0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3778 = VCVTPD2QQZ128rmk
21494 { 3806, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x1125e70002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3806 = VCVTPD2UDQZ128rmbk
21496 { 3808, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x2025e70002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3808 = VCVTPD2UDQZ128rmk
21524 { 3836, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x1125e70002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3836 = VCVTPD2UQQZ128rmbk
21526 { 3838, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x2025e70002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3838 = VCVTPD2UQQZ128rmk
21615 { 3927, 8, 1, 0, 1218, 0|(1ULL<<MCID::MayLoad), 0x9216b0002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3927 = VCVTPS2PDZ128rmbk
21617 { 3929, 8, 1, 0, 1218, 0|(1ULL<<MCID::MayLoad), 0x10216b0002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3929 = VCVTPS2PDZ128rmk
21669 { 3981, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x921ef0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3981 = VCVTPS2QQZ128rmbk
21671 { 3983, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x1021ef0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #3983 = VCVTPS2QQZ128rmk
21729 { 4041, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x921e70002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4041 = VCVTPS2UQQZ128rmbk
21731 { 4043, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x1021e70002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4043 = VCVTPS2UQQZ128rmk
21759 { 4071, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x11279b0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4071 = VCVTQQ2PDZ128rmbk
21761 { 4073, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x20279b0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4073 = VCVTQQ2PDZ128rmk
21789 { 4101, 8, 1, 0, 1214, 0|(1ULL<<MCID::MayLoad), 0x11256f0002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4101 = VCVTQQ2PSZ128rmbk
21791 { 4103, 8, 1, 0, 1214, 0|(1ULL<<MCID::MayLoad), 0x20256f0002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4103 = VCVTQQ2PSZ128rmk
21918 { 4230, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x11279b0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4230 = VCVTTPD2DQZ128rmbk
21920 { 4232, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x20279b0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4232 = VCVTTPD2DQZ128rmk
21950 { 4262, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x1125eb0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4262 = VCVTTPD2QQZ128rmbk
21952 { 4264, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x2025eb0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4264 = VCVTTPD2QQZ128rmk
21980 { 4292, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x1125e30002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4292 = VCVTTPD2UDQZ128rmbk
21982 { 4294, 8, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x2025e30002021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4294 = VCVTTPD2UDQZ128rmk
22010 { 4322, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x1125e30002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4322 = VCVTTPD2UQQZ128rmbk
22012 { 4324, 8, 1, 0, 1215, 0|(1ULL<<MCID::MayLoad), 0x2025e30002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4324 = VCVTTPD2UQQZ128rmk
22074 { 4386, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x921eb0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4386 = VCVTTPS2QQZ128rmbk
22076 { 4388, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x1021eb0002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4388 = VCVTTPS2QQZ128rmk
22134 { 4446, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x921e30002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4446 = VCVTTPS2UQQZ128rmbk
22136 { 4448, 8, 1, 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x1021e30002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4448 = VCVTTPS2UQQZ128rmk
22220 { 4532, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x921eb0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4532 = VCVTUDQ2PDZ128rmbk
22222 { 4534, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x1021eb0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4534 = VCVTUDQ2PDZ128rmk
22277 { 4589, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x1125eb0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4589 = VCVTUQQ2PDZ128rmbk
22279 { 4591, 8, 1, 0, 1213, 0|(1ULL<<MCID::MayLoad), 0x2025eb0003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4591 = VCVTUQQ2PDZ128rmk
22307 { 4619, 8, 1, 0, 1214, 0|(1ULL<<MCID::MayLoad), 0x1125eb0003821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4619 = VCVTUQQ2PSZ128rmbk
22309 { 4621, 8, 1, 0, 1214, 0|(1ULL<<MCID::MayLoad), 0x2025eb0003821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4621 = VCVTUQQ2PSZ128rmk
22532 { 4844, 8, 1, 0, 1220, 0|(1ULL<<MCID::MayLoad), 0x102623c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4844 = VEXPANDPDZ128rmk
24567 { 6879, 8, 1, 0, 293, 0|(1ULL<<MCID::MayLoad), 0x11250b8004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #6879 = VGETEXPPDZ128mbk
24569 { 6881, 8, 1, 0, 293, 0|(1ULL<<MCID::MayLoad), 0x20250b8004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #6881 = VGETEXPPDZ128mk
25270 { 7582, 8, 1, 0, 1159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x2024a38002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #7582 = VMOVAPDZ128rmk
25348 { 7660, 8, 1, 0, 1160, 0|(1ULL<<MCID::MayLoad), 0x10244b8003821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #7660 = VMOVDDUPZ128rmk
25409 { 7721, 8, 1, 0, 1161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x2025bfc002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #7721 = VMOVDQA64Z128rmk
25516 { 7828, 8, 1, 0, 1161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x2025bfc003021ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #7828 = VMOVDQU64Z128rmk
25734 { 8046, 8, 1, 0, 1159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x2024438002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #8046 = VMOVUPDZ128rmk
26071 { 8383, 8, 1, 0, 237, 0|(1ULL<<MCID::MayLoad), 0x11247fc004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #8383 = VPABSQZ128rmbk
26073 { 8385, 8, 1, 0, 237, 0|(1ULL<<MCID::MayLoad), 0x20247fc004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #8385 = VPABSQZ128rmk
26773 { 9085, 8, 1, 0, 1157, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x102567c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #9085 = VPBROADCASTQZ128mk
27235 { 9547, 8, 1, 0, 1235, 0|(1ULL<<MCID::MayLoad), 0x112713c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #9547 = VPCONFLICTQZ128rmbk
27237 { 9549, 8, 1, 0, 1235, 0|(1ULL<<MCID::MayLoad), 0x202713c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #9549 = VPCONFLICTQZ128rmk
27989 { 10301, 8, 1, 0, 1220, 0|(1ULL<<MCID::MayLoad), 0x102627c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #10301 = VPEXPANDQZ128rmk
28163 { 10475, 8, 1, 0, 509, 0|(1ULL<<MCID::MayLoad), 0x112513c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #10475 = VPLZCNTQZ128rmbk
28165 { 10477, 8, 1, 0, 509, 0|(1ULL<<MCID::MayLoad), 0x202513c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #10477 = VPLZCNTQZ128rmk
28939 { 11251, 8, 1, 0, 1203, 0|(1ULL<<MCID::MayLoad), 0x4208bc004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11251 = VPMOVSXBQZ128rmk
28983 { 11295, 8, 1, 0, 1203, 0|(1ULL<<MCID::MayLoad), 0x102097c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11295 = VPMOVSXDQZ128rmk
29027 { 11339, 8, 1, 0, 1203, 0|(1ULL<<MCID::MayLoad), 0x82093c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11339 = VPMOVSXWQZ128rmk
29179 { 11491, 8, 1, 0, 1203, 0|(1ULL<<MCID::MayLoad), 0x420cbc004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11491 = VPMOVZXBQZ128rmk
29223 { 11535, 8, 1, 0, 1203, 0|(1ULL<<MCID::MayLoad), 0x1020d7c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11535 = VPMOVZXDQZ128rmk
29267 { 11579, 8, 1, 0, 1203, 0|(1ULL<<MCID::MayLoad), 0x820d3c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11579 = VPMOVZXWQZ128rmk
29568 { 11880, 8, 1, 0, 237, 0|(1ULL<<MCID::MayLoad), 0x112557c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11880 = VPOPCNTQZ128rmbk
29570 { 11882, 8, 1, 0, 237, 0|(1ULL<<MCID::MayLoad), 0x202557c004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #11882 = VPOPCNTQZ128rmk
31776 { 14088, 8, 1, 0, 546, 0|(1ULL<<MCID::MayLoad), 0x1125338004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #14088 = VRCP14PDZ128mbk
31778 { 14090, 8, 1, 0, 546, 0|(1ULL<<MCID::MayLoad), 0x2025338004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #14090 = VRCP14PDZ128mk
32068 { 14380, 8, 1, 0, 553, 0|(1ULL<<MCID::MayLoad), 0x11253b8004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #14380 = VRSQRT14PDZ128mbk
32070 { 14382, 8, 1, 0, 553, 0|(1ULL<<MCID::MayLoad), 0x20253b8004821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #14382 = VRSQRT14PDZ128mk
32418 { 14730, 8, 1, 0, 563, 0|(1ULL<<MCID::MayLoad), 0x1125478002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #14730 = VSQRTPDZ128mbk
32420 { 14732, 8, 1, 0, 563, 0|(1ULL<<MCID::MayLoad), 0x2025478002821ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #14732 = VSQRTPDZ128mk