reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenInstrInfo.inc
20723   { 3035,	8,	1,	0,	25,	0|(1ULL<<MCID::MayLoad), 0x106d638003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3035 = VADDSDZrm_Intkz
20738   { 3050,	8,	1,	0,	27,	0|(1ULL<<MCID::MayLoad), 0x869634003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3050 = VADDSSZrm_Intkz
21830   { 4142,	8,	1,	0,	1234,	0|(1ULL<<MCID::MayLoad), 0x106d6b0003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4142 = VCVTSD2SSZrm_Intkz
21886   { 4198,	8,	1,	0,	1219,	0|(1ULL<<MCID::MayLoad), 0x8696b0003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4198 = VCVTSS2SDZrm_Intkz
22443   { 4755,	8,	1,	0,	127,	0|(1ULL<<MCID::MayLoad), 0x106d7b8003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4755 = VDIVSDZrm_Intkz
22458   { 4770,	8,	1,	0,	129,	0|(1ULL<<MCID::MayLoad), 0x8697b4003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4770 = VDIVSSZrm_Intkz
24627   { 6939,	8,	1,	0,	293,	0|(1ULL<<MCID::MayLoad), 0x106d0f8004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #6939 = VGETEXPSDZmkz
24636   { 6948,	8,	1,	0,	293,	0|(1ULL<<MCID::MayLoad), 0x8690f4004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #6948 = VGETEXPSSZmkz
25055   { 7367,	8,	1,	0,	71,	0|(1ULL<<MCID::MayLoad), 0x106d7f8003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7367 = VMAXSDZrm_Intkz
25070   { 7382,	8,	1,	0,	73,	0|(1ULL<<MCID::MayLoad), 0x8697f4003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7382 = VMAXSSZrm_Intkz
25226   { 7538,	8,	1,	0,	71,	0|(1ULL<<MCID::MayLoad), 0x106d778003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7538 = VMINSDZrm_Intkz
25241   { 7553,	8,	1,	0,	73,	0|(1ULL<<MCID::MayLoad), 0x869774003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7553 = VMINSSZrm_Intkz
25897   { 8209,	8,	1,	0,	228,	0|(1ULL<<MCID::MayLoad), 0x106d678003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #8209 = VMULSDZrm_Intkz
25912   { 8224,	8,	1,	0,	230,	0|(1ULL<<MCID::MayLoad), 0x869674003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #8224 = VMULSSZrm_Intkz
31830   { 14142,	8,	1,	0,	286,	0|(1ULL<<MCID::MayLoad), 0x106d378004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14142 = VRCP14SDZrmkz
31836   { 14148,	8,	1,	0,	286,	0|(1ULL<<MCID::MayLoad), 0x869374004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14148 = VRCP14SSZrmkz
31866   { 14178,	8,	1,	0,	286,	0|(1ULL<<MCID::MayLoad), 0x106f2f8004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14178 = VRCP28SDZmkz
31875   { 14187,	8,	1,	0,	286,	0|(1ULL<<MCID::MayLoad), 0x86b2f4004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14187 = VRCP28SSZmkz
32122   { 14434,	8,	1,	0,	297,	0|(1ULL<<MCID::MayLoad), 0x106d3f8004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14434 = VRSQRT14SDZrmkz
32128   { 14440,	8,	1,	0,	297,	0|(1ULL<<MCID::MayLoad), 0x8693f4004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14440 = VRSQRT14SSZrmkz
32158   { 14470,	8,	1,	0,	297,	0|(1ULL<<MCID::MayLoad), 0x106f378004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14470 = VRSQRT28SDZmkz
32167   { 14479,	8,	1,	0,	297,	0|(1ULL<<MCID::MayLoad), 0x86b374004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14479 = VRSQRT28SSZmkz
32244   { 14556,	8,	1,	0,	27,	0|(1ULL<<MCID::MayLoad), 0x106cb78004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14556 = VSCALEFSDZrmkz
32253   { 14565,	8,	1,	0,	27,	0|(1ULL<<MCID::MayLoad), 0x868b74004821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14565 = VSCALEFSSZrmkz
32485   { 14797,	8,	1,	0,	313,	0|(1ULL<<MCID::MayLoad), 0x106d478003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14797 = VSQRTSDZm_Intkz
32500   { 14812,	8,	1,	0,	316,	0|(1ULL<<MCID::MayLoad), 0x869474003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14812 = VSQRTSSZm_Intkz
32584   { 14896,	8,	1,	0,	25,	0|(1ULL<<MCID::MayLoad), 0x106d738003821ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14896 = VSUBSDZrm_Intkz
32599   { 14911,	8,	1,	0,	27,	0|(1ULL<<MCID::MayLoad), 0x869734003021ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14911 = VSUBSSZrm_Intkz