|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8103 { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22679 { 199 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20186 /* 40772*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND64rm), 0|OPFL_Chain|OPFL_MemRefs,
20239 /* 40883*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND64rm), 0|OPFL_Chain|OPFL_MemRefs,
36755 /* 76853*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND64rm), 0|OPFL_Chain|OPFL_MemRefs,
36808 /* 76964*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND64rm), 0|OPFL_Chain|OPFL_MemRefs,
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp 413 case X86::AND64rm:
lib/Target/X86/X86ISelDAGToDAG.cpp 1194 N0Opc == X86::AND32rm || N0Opc == X86::AND64rm) {
1200 case X86::AND64rm: NewOpc = X86::TEST64mr; break;
4591 case ISD::AND: ROpc = X86::AND64rr; MOpc = X86::AND64rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 1229 { X86::AND64rr, X86::AND64rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3435 case X86::AND16rr: case X86::AND8rr: case X86::AND64rm:
lib/Target/X86/X86MacroFusion.cpp 67 case X86::AND64rm:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1495 case X86::AND64rm: