|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8082 { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22675 { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20176 /* 40749*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND32rm), 0|OPFL_Chain|OPFL_MemRefs,
20228 /* 40859*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND32rm), 0|OPFL_Chain|OPFL_MemRefs,
36745 /* 76830*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND32rm), 0|OPFL_Chain|OPFL_MemRefs,
36797 /* 76940*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND32rm), 0|OPFL_Chain|OPFL_MemRefs,
lib/Target/X86/X86ISelDAGToDAG.cpp 1194 N0Opc == X86::AND32rm || N0Opc == X86::AND64rm) {
1199 case X86::AND32rm: NewOpc = X86::TEST32mr; break;
4581 case ISD::AND: ROpc = X86::AND32rr; MOpc = X86::AND32rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 1228 { X86::AND32rr, X86::AND32rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3436 case X86::AND32rm: case X86::AND16rm: case X86::AND8rm:
lib/Target/X86/X86MacroFusion.cpp 63 case X86::AND32rm:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1494 case X86::AND32rm: