|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 3159 { 251, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #251 = ADD4
3161 { 253, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #253 = ADD4o
3166 { 258, 3, 1, 4, 115, 0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList4, OperandInfo53, -1 ,nullptr }, // Inst #258 = ADDC
3169 { 261, 3, 1, 4, 245, 0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList5, OperandInfo53, -1 ,nullptr }, // Inst #261 = ADDCo
3170 { 262, 3, 1, 4, 115, 0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo53, -1 ,nullptr }, // Inst #262 = ADDE
3173 { 265, 3, 1, 4, 115, 0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo53, -1 ,nullptr }, // Inst #265 = ADDEo
3210 { 302, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #302 = AND
3213 { 305, 3, 1, 4, 116, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #305 = ANDC
3216 { 308, 3, 1, 4, 116, 0, 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #308 = ANDCo
3225 { 317, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #317 = ANDo
3377 { 469, 3, 1, 4, 291, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #469 = BRINC
3379 { 471, 3, 1, 4, 110, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #471 = CMPB
3448 { 540, 3, 1, 4, 236, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #540 = DIVW
3449 { 541, 3, 1, 4, 237, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #541 = DIVWE
3450 { 542, 3, 1, 4, 237, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #542 = DIVWEU
3451 { 543, 3, 1, 4, 242, 0, 0xdULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #543 = DIVWEUo
3452 { 544, 3, 1, 4, 242, 0, 0xdULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #544 = DIVWEo
3453 { 545, 3, 1, 4, 236, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #545 = DIVWU
3454 { 546, 3, 1, 4, 240, 0, 0xdULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #546 = DIVWUo
3455 { 547, 3, 1, 4, 240, 0, 0xdULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #547 = DIVWo
3499 { 591, 3, 1, 4, 17, 0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #591 = EFSADD
3514 { 606, 3, 1, 4, 18, 0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #606 = EFSDIV
3515 { 607, 3, 1, 4, 21, 0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #607 = EFSMUL
3518 { 610, 3, 1, 4, 19, 0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #610 = EFSSUB
3527 { 619, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #619 = EQV
3530 { 622, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #622 = EQVo
3880 { 972, 3, 1, 4, 179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #972 = LBZCIX
3895 { 987, 3, 1, 4, 179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #987 = LDCIX
3935 { 1027, 3, 1, 4, 179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1027 = LHZCIX
3971 { 1063, 3, 1, 4, 179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1063 = LWZCIX
4044 { 1136, 3, 1, 4, 236, 0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1136 = MODSW
4046 { 1138, 3, 1, 4, 237, 0, 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1138 = MODUW
4089 { 1181, 3, 1, 4, 145, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1181 = MULHW
4090 { 1182, 3, 1, 4, 146, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1182 = MULHWU
4091 { 1183, 3, 1, 4, 153, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1183 = MULHWUo
4092 { 1184, 3, 1, 4, 154, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1184 = MULHWo
4097 { 1189, 3, 1, 4, 145, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1189 = MULLW
4098 { 1190, 3, 1, 4, 154, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1190 = MULLWo
4102 { 1194, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1194 = NAND
4105 { 1197, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1197 = NANDo
4114 { 1206, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1206 = NOR
4117 { 1209, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1209 = NORo
4118 { 1210, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1210 = OR
4121 { 1213, 3, 1, 4, 116, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1213 = ORC
4124 { 1216, 3, 1, 4, 116, 0, 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1216 = ORCo
4129 { 1221, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1221 = ORo
4383 { 1475, 3, 1, 4, 130, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1475 = SLW
4386 { 1478, 3, 1, 4, 253, 0, 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1478 = SLWo
4399 { 1491, 3, 1, 4, 132, 0, 0x8ULL, nullptr, ImplicitList4, OperandInfo53, -1 ,nullptr }, // Inst #1491 = SRAW
4402 { 1494, 3, 1, 4, 254, 0, 0x8ULL, nullptr, ImplicitList5, OperandInfo53, -1 ,nullptr }, // Inst #1494 = SRAWo
4405 { 1497, 3, 1, 4, 130, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1497 = SRW
4408 { 1500, 3, 1, 4, 253, 0, 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1500 = SRWo
4411 { 1503, 3, 0, 4, 219, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1503 = STBCIX
4426 { 1518, 3, 0, 4, 219, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1518 = STDCIX
4446 { 1538, 3, 0, 4, 219, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1538 = STHCIX
4470 { 1562, 3, 0, 4, 219, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1562 = STWCIX
4499 { 1591, 3, 1, 4, 115, 0, 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1591 = SUBF
4502 { 1594, 3, 1, 4, 115, 0, 0xcULL, nullptr, ImplicitList4, OperandInfo53, -1 ,nullptr }, // Inst #1594 = SUBFC
4505 { 1597, 3, 1, 4, 245, 0, 0xcULL, nullptr, ImplicitList5, OperandInfo53, -1 ,nullptr }, // Inst #1597 = SUBFCo
4506 { 1598, 3, 1, 4, 115, 0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo53, -1 ,nullptr }, // Inst #1598 = SUBFE
4509 { 1601, 3, 1, 4, 115, 0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo53, -1 ,nullptr }, // Inst #1601 = SUBFEo
4520 { 1612, 3, 1, 4, 115, 0, 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1612 = SUBFo
4555 { 1647, 3, 0, 4, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1647 = TLBSX2
4556 { 1648, 3, 0, 4, 299, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1648 = TLBSX2D
4567 { 1659, 3, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1659 = UpdateGBR
4862 { 1954, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1954 = XOR
4869 { 1961, 3, 1, 4, 116, 0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo53, -1 ,nullptr }, // Inst #1961 = XORo